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48-bit LBA addressing is hard-coded in the Verilog source code of Groundhog. Some devices may only support legacy 28-bit addressing, e.g., the
OCZ core series V2 SSD (Controller: JMicron JMF602B) does not seem to support 48-bit addressing. This means that the hardcoded commands in the transport module will not work: 0x25 in state DMA_READ_DW0_U and 0x35 in state DMA_WRITE_DW0_U. To
use the 28-bit addressing commands instead, change 0x25 to 0xC8 and 0x35 to 0xCA as indicated in the Verilog source code.