Groundhog implements a SATA host bus adapter. This Verilog-based project creates an easy-to-use interface between a user circuit on a Xilinx FPGA and a SATA hard drive or SSD.
This project includes binaries and example project files for the Digilent XUP-V5 board. This is a popular prototyping board that also includes two SATA headers. The project can easily be ported to any Virtex 5 that supports GTP tiles (any of the LXT, SXT, TXT
or FXT series chips but not the LX devices). This allows us to connect the FPGA to SATA I/II drives.
In the near future we hope to include support for the GTX tiles available on the Virtex 6 FPGAs. This will allow us to support SATA III.
Documentation for Groundhog is available here